One of the goals of the semiconductor industry is to shrink the size of a semiconductor device while increasing its functionality and performance. A large number of electronic devices like cell phones, cameras, and computers use semiconductor devices. The smaller, faster, and more high-performance the device, the better the consumer product that it serves. Fitting in more components in a smaller area on the device is one of the ways of achieving this goal. Using novel low-k dielectric materials to increase the speed of the device is another way.
When using low-k dielectric materials, moisture penetration and consequent degradation of the low-k material can be a problem. Using a double moisture barrier overcomes this problem. Further, low-k materials are fragile; the dicing operation, which severs the device from the wafer it sits on, may initiate cracks in the material that propagate and cause device failure during operation. Using a crackstop overcomes this problem. Combining the crack stop and double moisture barrier into one structure serves to decrease the size of the device, while maintaining its reliability. Such a structure is shown in U.S. Pat. Pub. 2004/0129938, which is incorporated herein by reference.
Another application of this approach has been to provide a crackstop that also serves to enhance substrate noise isolation as discussed in U.S. Pat. Pub. 2005/0110118, which is incorporated herein by reference. Providing a double crackstop structure, with the first structure being comprised of thin metal layers providing high resistance and the second structure being comprised of thick metal layers providing mechanical strength serves the dual purpose of mechanical integrity with reduced substrate noise.